Mnemonic
SD 
Description
Purpose of this instruction is to subtract a 32bit operand that is in core storage from the contents of the accumulator and accumulator extension. The accumulator and accumulator extension must be loaded with the desired operand before the subtractdouble operation is performed. A loaddouble instruction can be used to load the accumulator and accumulator extension.
The operand addressed by the subtractdouble instruction must start at an evenword address in core storage. If an oddword address is specified by the subtractdouble instruction, the single word at that address is subtracted from the accumulator and from the accumulator extension.
Except for the size of the operands, the subtractdouble operation proceeds in much the same manner as the subtract operation:
Pictorially, the operation proceeds as follows:
Except for the fact that the operand addressed should start at an even word address, there are no addressing exceptions for the subtractdouble instruction; all forms of addressing that are described under "EffectiveAddress Generation" apply to the SD instruction.
Indicators: The carry indicator is automatically reset to 0 at the beginning of execution of a subtract double instruction. If, during execution of the subtractdouble instruction, a borrow occurs to the left of the highorder (leftmost) position of the accumulator, then the carry indicator is set to 1 (on); if no such borrow occurs, the carry indicator remains reset. It can subsequently be set or reset by the various actions listed under "Carry and Overflow Indicators" (see Figure 13).
The overflow indicator must be reset to 0 if it is to be used during execution of a subtractdouble instruction. If the overflow indicator is at a value of 1 at the start of a subtractdouble operation, it is not changed regardless of the result of the operation.
If the overflow indicator is at a value of zero at the start of a subtractdouble operation, it is set to a value of 1 if the subtraction produces a result that exceeds the capacity of the accumulator plus the accumulator extension. For example, assume that the number 1 is subtracted from the largest negative number that can be held in the accumulator and accumulator extension:
S 1 000 0000 0000 0000 0000 0000 0000 0000 In accumulator and extension 0 000 0000 0000 0000 0000 0000 0000 0001 From core storage 0 111 1111 1111 1111 1111 1111 1111 1111 (S = sign bit)
The capacity of the accumulator and accumulator extension is exceeded because subtracting 1 from a negative number should produce a negative number result that is 1 greater than the original number. But the result is clearly a positive number (bit 0 in the accumulator equals 0). Therefore, for this operation, the overflow indicator is set on.
Maximum capacity of the accumulator and accumulator extension is:
Powerof2 Notation  Decimal Notation  Hexadecimal Notation 

+2^{31}1  +2,147,483,647  +7FFFFFFF 
2^{31}  2,147,483,648  80000000 
Refer to "Carry and Overflow Indicators" for a discussion of how these two indicators can be used together in certain arithmetic operations.
Examples
Subtract Double
Assembler Language Coding  Hexadecimal Value  Description of Instruction  

Label  Operation  F  T  


32  33  35..40..  
SD  DISP  98XX  Subtract contents of CSL at EA (I+DISP) and EA+1 from A and Q  
SD  1  DISP  99XX  Subtract contents of CSL at EA (XR1+DISP) and EA+1 from A and Q  
SD  2  DISP  9AXX  Subtract contents of CSL at EA (XR2+DISP) and EA+1 from A and Q  
SD  3  DISP  9BXX  Subtract contents of CSL at EA (XR3+DISP) and EA+1 from A and Q  
SD  L  ADDR  9C00XXXX  Subtract contents of CSL at EA (Addr) and EA+1 from A and Q  
SD  L  1  ADDR  9D00XXXX  Subtract contents of CSL at EA (Addr+XR1) and EA+1 from A and Q  
SD  L  2  ADDR  9E00XXXX  Subtract contents of CSL at EA (Addr+XR2) and EA+1 from A and Q  
SD  L  3  ADDR  9F00XXXX  Subtract contents of CSL at EA (Addr+XR3) and EA+1 from A and Q  
SD  I  ADDR  9C80XXXX  Subtract contents of CSL at EA (V in CSL at Addr) and EA+1 from A and Q  
SD  I  1  ADDR  9D80XXXX  Subtract contents of CSL at EA (V in CSL at "Addr+XR1") and EA+1 from A and Q  
SD  I  2  ADDR  9E80XXXX  Subtract contents of CSL at EA (V in CSL at "Addr+XR2") and EA+1 from A and Q  
SD  I  3  ADDR  9F80XXXX  Subtract contents of CSL at EA (V in CSL at "Addr+XR3") and EA+1 from A and Q 
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